Addressing useless test data in core-based system-on-a-chip test
نویسندگان
چکیده
منابع مشابه
Addressing useless test data in core-based system-on-a-chip test
This paper analyzes the test memory requirements for core-based systems-on-a-chips and identifies useless test data as one of the contributors to the total amount of test data. The useless test data comprises the padding bits necessary to compensate for the difference between the lengths of different chains in multiple scan chains designs. Although useless test data does not represent any relev...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
سال: 2003
ISSN: 0278-0070
DOI: 10.1109/tcad.2003.818376